Day21 - hwmon Driver Cache Mechanism

🎯 Objective

In Day 20, the driver successfully integrated with the hwmon subsystem.

However, each read operation still triggered an I2C transaction, which is inefficient.

In this lab, we introduce a cache mechanism to:

• Reduce unnecessary I2C transactions
• Improve performance
• Implement a time-based update policy

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🧠 Design Concept

Problem

userspace read → hwmon → driver → I2C read

Every read causes hardware access.

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Solution: Add Cache Layer

userspace
   ↓
hwmon
   ↓
driver cache   ← NEW
   ↓
I2C (only when needed)

---

🧩 Key Design

Cache Data Structure

struct myi2c_sensor_data {
    struct i2c_client *client;
    struct mutex lock;

    bool initialized;
    long temp_mc_cached;
    unsigned long last_update;
    unsigned int cache_interval_ms;
};

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Cache Policy

if (!initialized)
    update
else if (now < last_update + interval)
    use cache
else
    update

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Update Flow

update_once()
    ↓
read raw
    ↓
convert to milli-degree
    ↓
store in cache
    ↓
update timestamp

---

🔧 Implementation

1. Cache Update Helper

static int myi2c_sensor_update_if_needed(struct myi2c_sensor_data *data)
{
    int ret;
    s16 raw;
    unsigned long interval_jiffies;

    if (!data->initialized)
        goto do_update;

    interval_jiffies = msecs_to_jiffies(data->cache_interval_ms);

    if (time_before(jiffies, data->last_update + interval_jiffies))
        return 0;

do_update:
    ret = myi2c_sensor_update_once(data);
    if (ret < 0)
        return ret;

    ret = myi2c_sensor_read_temp_raw(data, &raw);
    if (ret < 0)
        return ret;

    data->temp_mc_cached = raw * 10;
    data->last_update = jiffies;
    data->initialized = true;

    return 0;
}

---

2. Modify Read Path

static int myi2c_sensor_read_temp_mc(struct myi2c_sensor_data *data, long *temp_mc)
{
    int ret;

    mutex_lock(&data->lock);

    ret = myi2c_sensor_update_if_needed(data);
    if (ret < 0)
        goto out;

    *temp_mc = data->temp_mc_cached;

out:
    mutex_unlock(&data->lock);
    return ret;
}

---

⚙️ sysfs Control (Cache Interval)

Show

static ssize_t cache_interval_show(struct device *dev,
                                   struct device_attribute *attr, char *buf)
{
    struct myi2c_sensor_data *data = dev_get_drvdata(dev);
    unsigned int interval;

    mutex_lock(&data->lock);
    interval = data->cache_interval_ms;
    mutex_unlock(&data->lock);

    return sysfs_emit(buf, "%u\n", interval);
}

---

Store

static ssize_t cache_interval_store(struct device *dev,
                                    struct device_attribute *attr,
                                    const char *buf, size_t count)
{
    struct myi2c_sensor_data *data = dev_get_drvdata(dev);
    unsigned long val;

    if (kstrtoul(buf, 0, &val))
        return -EINVAL;

    mutex_lock(&data->lock);
    data->cache_interval_ms = (unsigned int)val;
    mutex_unlock(&data->lock);

    return count;
}

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Attribute Registration

static DEVICE_ATTR_RW(cache_interval);

static struct attribute *myi2c_sensor_attrs[] = {
    ...
    &dev_attr_cache_interval.attr,
    NULL,
};

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🧪 Testing

Test Script

./test_cache.sh /sys/class/hwmon/hwmon3

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Expected Behavior

Case 1: cache_interval = 0

value changes every read

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Case 2: cache_interval = 200 ms

A
A   ← cache hit
B
B   ← cache hit
C
C

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Case 3: cache_interval = 1000 ms

A
A
A
A
A

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🧠 Key Learning Points

1. Driver Policy vs Mechanism

• Mechanism → I2C read
• Policy → when to read

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2. Cache Responsibility

The hwmon subsystem does NOT handle caching.

👉 Driver must implement it.

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3. Performance Trade-off

Mode	Behavior
No cache	Accurate but slow
Cache	Efficient but slightly stale

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4. Thread Safety

• Cache access protected by mutex
• Prevent race conditions

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🚀 Result

The driver is now:

• hwmon-compliant
• performance-optimized
• policy-driven
• closer to production-level design

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📌 Next Step

• Background polling (workqueue / timer)
• Interrupt-driven sensor
• Multi-channel support
• Integration with lm-sensors

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