Day31 Learning Log¶
📌 What I learned¶
- how to debug UART systematically
- how to separate layers (TTY vs driver vs hardware)
- how to identify TX vs RX failure
- how to validate using deterministic tests
📌 Key insights¶
1. write() success does not guarantee transmission¶
data may still be in xmit buffer
2. RX is interrupt-driven¶
data path:
3. termios is critical¶
many issues are caused by:
- canonical mode
- echo
- incorrect flags
4. shell tools can be misleading¶
- cat is not reliable
- dd + hexdump is deterministic
- Python test is most reliable
5. debugging must be layered¶
📌 Difficulties¶
- understanding TX stuck condition
- distinguishing driver vs user-space issues
- interpreting inconsistent RX behavior
📌 Takeaway¶
UART debugging is about finding where data stops flowing
and verifying each layer independently