Day37 Log – IIO FIFO Mode

Environment

• Platform: Raspberry Pi
• Interface: I2C
• Sensor: STM32-based fake ADC
• Channels: 4
• Data width: 16-bit per channel

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Module Load

myadc operation mode: fifo
myadc IIO device registered

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IRQ Activity

read fifo done
read fifo done
read fifo done

Observation:

• IRQ triggered correctly
• FIFO drained after each interrupt

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IIO Buffer Output

00000000  09 23 0a 87 0a eb 0a c0
00000010  09 24 0a 88 0a ec 0a c1
...

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Data Interpretation

Each frame:

[ch0_L ch0_H ch1_L ch1_H ch2_L ch2_H ch3_L ch3_H]

Example:

09 23 → ch0 = 0x2309
0a 87 → ch1 = 0x870a

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Observations

• Data is continuous across frames
• Multi-channel values increment correctly
• No corruption in burst reads

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FIFO Behavior

• FIFO accumulates samples
• IRQ triggers at watermark
• Driver drains FIFO
• IRQ deasserts correctly

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Result

FIFO mode successfully implemented:

STM32 FIFO
 → IRQ (watermark)
 → Linux IRQ handler
 → IIO trigger
 → pollfunc
 → burst read FIFO
 → unpack frames
 → buffer push
 → user-space read

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Conclusion

• FIFO reduces IRQ frequency
• Burst read improves I2C efficiency
• IIO buffer integration works correctly

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