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Day 27 - SPI Sensor Driver

Summary

Today I extended the sensor driver to support SPI, while keeping a shared core architecture.

This validates that the driver design is transport-agnostic.


Key Achievements

  • Implemented SPI bus layer (mysensor_spi.c)
  • Reused existing mysensor_core
  • Designed SPI protocol for STM32 fake sensor
  • Fixed SPI transfer mismatch issue
  • Successfully read CHIP_ID over SPI
  • Integrated with Device Tree
  • Verified driver binding
  • Enabled hwmon interface

Problems Encountered

1. CHIP_ID = 0x00

Cause: - Incorrect SPI transfer method

Fix: - Replaced spi_write_then_read() with spi_sync()


2. SPI chipselect conflict

Error: - chipselect already in use

Cause: - spidev enabled by default

Fix: - disable spidev in config.txt


3. temp1_input not readable

Error: - Resource temporarily unavailable

Cause: - cache not initialized - polling disabled

Fix: - enable polling


Observations

  • SPI is full-duplex and timing-sensitive
  • Linux SPI API behavior differs from user-space spidev
  • Device Tree is critical for driver binding
  • dmesg is not always reliable for overlay debugging

What I Learned

  • Difference between SPI frame-based protocol vs register-based I2C
  • How to implement SPI driver using spi_sync
  • Importance of matching protocol timing between master and slave
  • How to debug driver binding issues
  • How to verify overlay using sysfs and device-tree

Next Steps

  • Add SPI interrupt support
  • Unify IRQ + polling logic
  • Improve cache strategy
  • Consider adding user control via sysfs

Conclusion

SPI support was successfully added without modifying the core layer.

This confirms the architecture is scalable and reusable across different buses.