Skip to content

Day98 - Linux DMA API

Objective

This lab introduces the Linux DMA Mapping API through a simulator.

Unlike previous memory-management labs, this lab focuses on how Linux prepares CPU memory for DMA-capable devices and how cache coherency is maintained between the CPU and hardware.

You will implement both streaming DMA and coherent DMA, then visualize ownership transfer and cache synchronization.

Prerequisites

Before starting this lab, you should understand:

  • Kernel Memory Allocation
  • Page Allocator
  • SLUB Allocator
  • kmalloc()
  • vmalloc()
  • vmap()
  • ioremap()
  • MMIO Access APIs
  • Memory Barriers

Learning Goals

After completing this lab, you should understand:

  • Why the Linux DMA Mapping API exists
  • CPU virtual address vs DMA address
  • Streaming DMA
  • Coherent DMA
  • DMA mapping lifetime
  • DMA ownership transfer
  • DMA direction
  • Cache coherency
  • Cache synchronization

Lab1 - DMA Mapping

Goal

Implement a simplified DMA mapping manager.

Implement

  • dma_map_single()
  • dma_unmap_single()
  • dma_mapping_error()

The simulator should manage:

  • CPU virtual address
  • DMA address
  • Mapping lifetime
  • Mapping ownership

Validation

Verify:

  • Basic mapping
  • Duplicate mapping rejection
  • Invalid parameters
  • Valid unmap
  • Invalid unmap

Lab2 - Coherent DMA

Goal

Implement coherent DMA allocation.

Implement

  • dma_alloc_coherent()
  • dma_free_coherent()

The simulator should model a shared memory region that is immediately visible to both the CPU and device.

Validation

Verify:

  • Basic coherent allocation
  • Multiple coherent allocations
  • Invalid allocation
  • Invalid free

Lab3 - Streaming DMA Lifecycle

Goal

Understand how ownership changes during a streaming DMA transfer.

Implement

Streaming DMA lifecycle:

CPU owns buffer
        │
        ▼
dma_map_single()
        │
        ▼
Device owns mapping
        │
        ▼
DMA transfer
        │
        ▼
dma_unmap_single()
        │
        ▼
CPU owns buffer

Validation

Verify:

  • DMA_TO_DEVICE lifecycle
  • DMA_FROM_DEVICE lifecycle
  • Unmap then remap
  • Invalid DMA direction

Lab4 - DMA Cache Coherency

Goal

Visualize CPU cache and device-visible memory.

The simulator maintains two conceptual memory views:

CPU Cache
        │
        ▼
DMA Mapping
        │
        ▼
Device Memory

Streaming DMA requires explicit synchronization.

Coherent DMA shares the same memory view.

Implement

  • dma_cpu_write()
  • dma_cpu_read()
  • dma_device_write()
  • dma_device_read()
  • dma_sync_single_for_device()
  • dma_sync_single_for_cpu()

Validation

Verify:

CPU → Device

CPU Write

↓

DIRTY

↓

dma_sync_single_for_device()

↓

Device observes latest data

Device → CPU

Device Write

↓

CPU Cache INVALID

↓

dma_sync_single_for_cpu()

↓

CPU observes latest data

Coherent DMA

Verify that:

  • CPU writes are immediately visible to the device.
  • Device writes are immediately visible to the CPU.
  • No synchronization API is required.

Invalid Synchronization

Verify rejection of:

  • Wrong DMA address
  • Wrong size
  • Wrong direction
  • Wrong synchronization API
  • Synchronization of coherent mappings

Summary

After completing this lab, you should understand:

  • Linux DMA Mapping APIs
  • Streaming DMA
  • Coherent DMA
  • DMA ownership
  • DMA direction
  • Cache coherency
  • Cache synchronization
  • CPU-visible and device-visible memory

These concepts form the foundation for understanding DMA-capable Linux drivers such as Ethernet, USB, SPI, storage, camera, and multimedia drivers.